1. In charge of designing and verifying image processing module
2. Communication with Japan peer in business and project level
3. Leading ASIC project on high level design and verification activities
4. Leading R&D actvity in ASIC design & verification tech.

工作内容：
1、负责图像处理模块的设计和验证工作
2、和日本同行进行业务及项目层面的沟通
3、领导ASIC（集成电路）项目的设计和项目活动使之往更高层面发展
4、带领研发团队更积极地进行ASIC（集成电路）设计和验证工作。

1. Fluent Japanese (in working environment, Fluent in listening, reading, writing)
2. Experience in digital logic design and verification, familiar with ASIC design flow and EDA tools

要求：
1、日语（用于社内及客户）
2、有数字逻辑设计和验证经验，熟悉ASIC设计流程和EDA工具 OR 熟悉C++，C语言也可以
3、数字电路前端设计，全开发
4、FPGA